KVL Loop Analysis

Hello! Welcome back to our course on radioelectronics.

In our last lesson, we explored Nodal Analysis, a powerful technique using Kirchhoff's Current Law (KCL) to determine unknown voltages in a circuit. Today, we will learn its counterpart, which focuses on currents and is based on the second of Kirchhoff's fundamental laws.

Introduction

Today's Topic: Kirchhoff's Voltage Law (KVL) for Loop Analysis

This lesson covers the fifth learning outcome in our "DC Circuit Fundamentals" module. We will introduce Kirchhoff's Voltage Law (KVL), which is rooted in the principle of conservation of energy. We will then apply it in a systematic procedure called Loop Analysis (or Mesh Analysis) to find unknown currents flowing in a circuit's loops.

Time to complete: Approximately 55 minutes.

Recap from Previous Lesson:

We learned that Kirchhoff's Current Law (KCL) states that the sum of currents entering a node must equal the sum of currents leaving it (conservation of charge).
We used KCL in a method called Nodal Analysis to find unknown node voltages by writing KCL equations and solving them as a system.

Just as Nodal Analysis is built on KCL to find voltages, Loop Analysis is built on KVL to find currents. These two methods are the cornerstones of DC circuit analysis.

1. Kirchhoff's Voltage Law (KVL)

Kirchhoff's Voltage Law is a statement about the conservation of energy in an electric field.

KVL states that the algebraic sum of all voltage drops and rises around any closed loop in a circuit must be zero.

Imagine walking on a mountain path that starts and ends at the same point. The sum of all your ascents (gains in elevation) and descents (losses in elevation) must equal zero, because you ended up at the same altitude. KVL is the electrical equivalent: as we "walk" around a closed loop, the sum of all voltage "rises" (from batteries or sources) must be balanced by the sum of all voltage "drops" (across resistors).

This first video segment introduces KVL and the crucial concept of voltage rises (lifts) and drops.

Please watch from 01:41 to 02:54. This will formally introduce you to the loop rule.

2. Sign Conventions for KVL

To apply KVL correctly, we must be consistent with our sign conventions. The sign (+ or -) of a voltage term in our KVL equation depends on the direction we travel around the loop relative to the direction of current or the polarity of a source.

This is the most critical part of the method. The following two clips explain the "rules of the road" for traversing a loop.

Resistors (02:54 - 05:11): This clip explains the sign convention for resistors.
Batteries (05:11 - 06:22): This clip explains the sign convention for voltage sources.

Here is a summary of those rules:

Component	Direction of Travel	Voltage Change	Sign in KVL Equation
Resistor	In the same direction as the assumed current.	Voltage Drop	- $I R$
Resistor	In the opposite direction of the assumed current.	Voltage Rise (Lift)	+ $I R$
Voltage Source	From the negative (-) to the positive (+) terminal.	Voltage Rise (Lift)	+ $V$
Voltage Source	From the positive (+) to the negative (-) terminal.	Voltage Drop	- $V$

Mastering these conventions is the key to successfully applying loop analysis.

3. The Loop Analysis Method

Loop analysis (often called Mesh Analysis for planar circuits) is a systematic procedure for finding unknown currents.

The General Procedure:

Identify the independent loops (or "meshes") in the circuit. A mesh is a loop that does not contain any other loops within it.
Assign a distinct current variable to each mesh (e.g., $i_{1}, i_{2}, ...$ ). It is standard practice to assume all loop currents flow in the clockwise direction. This simplifies dealing with shared components.
For each mesh, write a KVL equation by "walking" around the loop and summing the voltage drops and rises.
Use Ohm's Law ( $V = I R$ ) to express the voltage changes across resistors in terms of the unknown loop currents.
- For a resistor that is part of only one loop (e.g., $R_{1}$ in loop 1), the voltage drop is simply $i_{1} R_{1}$ .
- For a resistor shared between two loops (e.g., $R_{3}$ between loop 1 and loop 2), the net current is the difference between the two loop currents. If we are writing the equation for loop 1, the voltage drop is $(i_{1} - i_{2}) R_{3}$ . If we are writing for loop 2, it is $(i_{2} - i_{1}) R_{3}$ .
Solve the resulting system of simultaneous linear equations for the unknown loop currents.

4. Loop Analysis in Action

Let's apply this procedure to a few examples. Your background in solving systems of linear equations will be very useful here.

Example 1: Two-Loop Circuit with One Voltage Source

This example walks through setting up the KVL equations for a two-loop circuit and solving for the currents. It's a perfect demonstration of the method.

Watch from 06:22 to 15:24. Pay close attention to:

How the KVL equation for Loop 1 is formed by summing the voltages.
How the KVL equation for Loop 2 is formed. Notice the sign convention for the shared resistor $R_{2}$ when traversing the loop.
The use of a KCL equation at the junction to relate the branch currents to the loop currents (and to verify the final answer).

Example 2: Multi-Loop, Multi-Source Circuit

Now, let's look at a more typical scenario with multiple voltage sources, which is where loop analysis truly excels. This video presents a slightly different problem and a very efficient way to set it up.

Watch from 00:00 to 04:07. This segment demonstrates:

Assuming current directions: A practical approach is shown. As the presenter notes, if you assume the wrong direction, the math will work out, and your answer will simply be negative. A negative current means it flows in the opposite direction to your initial assumption.
Setting up the equations: The video uses a mix of KCL and KVL to establish a system of three equations for three unknown branch currents.
The remainder of the video (04:07 to 09:15) shows the algebraic solution, which you can review if you wish. The key takeaway is the setup process.

This example from The Organic Chemistry Tutor also provides an excellent walkthrough of a multi-source circuit. It demonstrates a clever trick: using KCL to define the current in a shared branch before writing the loop equations, which reduces the number of variables from three to two.

Please watch from 15:24 to 29:16. This is a powerful technique to add to your toolkit.

Conclusion

You have now learned Loop Analysis, a robust method for analyzing circuits based on Kirchhoff's Voltage Law. Together with Nodal Analysis, it forms a complete framework for solving any DC circuit.

Key Takeaways:

Kirchhoff's Voltage Law (KVL): The sum of voltage rises and drops around any closed loop is zero (conservation of energy).
Loop Analysis: A systematic procedure for finding unknown loop currents.
Core Technique: For each loop, write a KVL equation using consistent sign conventions for voltage sources and resistors.
Shared Components: The voltage across a resistor shared by two loops depends on the difference between the two loop currents.
Solving Systems: For a circuit with N independent loops, you will solve a system of N linear equations for the N loop currents.

Preview of Next Lesson:

In our next lesson, we will look at the Voltage Divider Rule. While Loop Analysis can solve any circuit, for simple series circuits, the Voltage Divider Rule provides a much faster shortcut to find the voltage across a specific resistor. We will see that this rule is, in fact, a direct consequence of KVL.